cystech electronics corp. spec. no. : c948h8 issued date : 2014.06.06 revised date : page no. : 1/9 mtb1d7n03a cystek product specification n-channel logic level enhancement mode power mosfet mtb1d7n03ath8 bv dss 30v i d @v gs =10v 90a th8 features ? single drive requirement ? low on-resistance ? fast switching characteristic ? dynamic dv/dt rating ? pb-free lead plating and halogen-free package symbol outline mtb1d7n03ath8 dfn5 6 pin 1 g gate d drain s source ordering information device package shipping dfn 5 6 MTB1D7N03ATH8-0-T6-G (pb-free lead plating and halogen-free package) 3000 pcs / tape & reel r ds(on) @v gs =10v, i d =30a 1.5 m (typ) r ds(on) @v gs =4.5v, i d =20a 2.1 m (typ) environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t6 : 3000 pcs / tape & reel,13? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c948h8 issued date : 2014.06.06 revised date : page no. : 2/9 mtb1d7n03ath8 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds 30 gate-source voltage v gs 20 v continuous drain current @ t c =25 c, v gs =10v 90 continuous drain current @ t c =100c, v gs =10v 57 continuous drain current @ t a =25 c, v gs =10v 20 continuous drain current @ t a =70 c, v gs =10v i d 16 pulsed drain current i dm 360 *1 avalanche current i as 77 a avalanche energy @ l=0.1mh, i d =77a, r g =25 e as 295 mj t c =25 50 t c =100 20 t a =25 2.5 total power dissipation t a =70 p d 1.6 w operating junction and storage temperature range tj, tstg -55~+150 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 2.5 c/w thermal resistance, junction-to-ambient, max r th,j-a 50 *3 c/w note : 1. pulse width limited by maximum junction temperature 2. duty cycle 1% 3. surface mounted on 1 in2 copper pad of fr-4 board, t 10s; 125 c/w when mounted on minimum copper pad. characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 30 - - v v gs =0v, i d =250 a v gs(th) 1.0 1.9 2.5 v v ds = v gs , i d =250 a g fs *1 - 58 - s v ds =5v, i d =20a i gss - - 100 na v gs = 20v - - 1 v ds =24v, v gs =0v i dss - - 25 a v ds =24v, v gs =0v, tj=125 c - 1.5 2.2 m v gs =10v, i d =30a r ds(on) *1 - 2.1 4.0 m v gs =4.5v, i d =20a dynamic ciss - 5385 - coss - 935 - crss - 854 - pf v gs =0v, v ds =15v, f=1mhz
cystech electronics corp. spec. no. : c948h8 issued date : 2014.06.06 revised date : page no. : 3/9 mtb1d7n03ath8 cystek product specification characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions qg *1, 2 - 53 - qgs *1, 2 - 16 - qgd *1, 2 - 25 - nc v ds =15v, v gs =4.5v, i d =15a t d(on) *1, 2 - 16 - tr *1, 2 - 21 - t d(off) *1, 2 - 76 - t f *1, 2 - 32 - ns v ds =15v, i d =1a, v gs =10v, r g =3.3 rg - 1.6 - v gs =15mv, v ds =0v, f=1mhz source-drain diode i s *1 - - 90 i sm *3 - - 360 a v sd *1 - 0.79 1.2 v i s =20a, v gs =0v trr - 28 - ns qrr - 23 - nc i f =20a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. recommended soldering footprint unit : mm
cystech electronics corp. spec. no. : c948h8 issued date : 2014.06.06 revised date : page no. : 4/9 mtb1d7n03ath8 cystek product specification typical characteristics typical output characteristics 0 60 120 180 240 300 360 012345 v ds , drain-source voltage(v) i d , drain current(a) 10v, 9v, 8v, 7v, 6v, 5v, 4.5v v gs =3v v gs =3.5v v gs =4v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 1 10 100 1000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =10v v gs =3v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 04812162 i dr , reverse drain current(a) v sd , source-drain voltage(v) static drain-source on-state resistance vs gate-source voltage 0 10 20 30 40 50 60 70 80 90 100 024681 0 0 tj=25c tj=125c drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 2.8 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , static drain-source on-state resistance(m) v gs =10v, i d =30a r ds( on) @tj=25c : 1.5m typ. v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =30a
cystech electronics corp. spec. no. : c948h8 issued date : 2014.06.06 revised date : page no. : 5/9 mtb1d7n03ath8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalizedthreshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 i d , drain current(a) g fs , forward transfer admittance(s) v ds =5v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0 102030405060 total gate charge---qg(nc) v gs , gate-source voltage(v) v ds =15v i d =15a maximum safe operating area 0.1 1 10 100 1000 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) dc 10ms 100ms 1ms 100 s 1s r ds( on) limit t c =25c, tj=150c, v gs =10v, r jc =2.5c/w single pulse maximum drain current vs case temperature 0 20 40 60 80 100 120 25 50 75 100 125 150 175 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, r jc =2.5c/w
cystech electronics corp. spec. no. : c948h8 issued date : 2014.06.06 revised date : page no. : 6/9 mtb1d7n03ath8 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 60 120 180 240 300 360 012345 v gs , gate-source voltage(v) i d , drain current (a) v ds =10v single pulse maximum power dissipation 0 500 1000 1500 2000 2500 3000 0.000 1 0.001 0.01 0.1 1 10 100 1000 pulse width(s) power (w) t j(max) =150c t c =25c jc =2.5c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =2.5 c/w
cystech electronics corp. spec. no. : c948h8 issued date : 2014.06.06 revised date : page no. : 7/9 mtb1d7n03ath8 cystek product specification reel dimension carrier tape dimension pin #1
cystech electronics corp. spec. no. : c948h8 issued date : 2014.06.06 revised date : page no. : 8/9 mtb1d7n03ath8 cystek product specification recommended wave soldering condition soldering time product peak temperature pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6c/second max. 6 minutes max. 8 minutes max. time 25 c to peak temperature note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c948h8 issued date : 2014.06.06 revised date : page no. : 9/9 mtb1d7n03ath8 cystek product specification dfn5 6 dimension marking: 8- device name date code lead power pak plastic packag e c 8 ystek package code: h millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. b1d7 n03a 8-lead dfn5 6 plastic package cys package code : h8 a 0.80 1.00 0.031 0.039 e 5.70 5.90 0.224 0.232 a1 0.00 0.05 0.000 0.002 e 1.27 bsc 0.050 bsc b 0.35 0.49 0.014 0.019 h 5.95 6.20 0.234 0.244 c 0.254 ref 0.010 ref l1 0.10 0.18 0.004 0.007 d 4.90 5.10 0.193 0.201 g 0.60 ref 0.024 ref f 1.40 ref 0.055 ref k 4.00 ref 0.157 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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